Evaluating Xeon Phi Coprocessor through Acoustic RTM

High Performance Computing (HPC) infrastructures in seismic processing are mandatory, as several hundreds of GBs of memory and TBs of disk are needed for modeling, migration or inversion. In the last decade, different computing alternatives have come to light that provide the required amount of resources for solving such large-scale seismic processing to the oil industry. Currently, the most promising options are those based on HPC accelerators, attached to a traditional processor (or host) that runs the operating system. Among the alternatives for such accelerators there are: the pioneering Cell/B.E from IBM, FPGAs mostly from Xilinx, GPUs from NVIDIA and AMD and, finally, the new Xeon Phi from Intel. The advantage of Intel’s alternative over previous accelerators are its foundations on traditional x86 architecture. Therefore, the portability of legacy code for the oil industry may be easier, and hence cheaper, than for other accelerators available in the market. The aim of this work is to analyze the performance and development cost on the Xeon Phi accelerator, for a well understood seismic problem such as RTM.