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Half-precision Performance Benefits on a Xeon Phi TTI RTM Application
- Publisher: European Association of Geoscientists & Engineers
- Source: Conference Proceedings, 77th EAGE Conference and Exhibition 2015, Jun 2015, Volume 2015, p.1 - 5
Abstract
Half-precision representation can potentially provide performance gains in applications where loading or storing floating-point values in 16-bit precision is sufficient to obtain correct results. This work extend this approach for a Tilted Transversely Isotropic RTM implementation. We show a strategy in which the 16-bit numerical representation can be applied to the input dataset avoiding accuracy degradation and leading to output results with acceptable tolerances. This work explores float16 floating-point solely as a storage format and the only operation required here for half-float representation is the conversion to and from 32-bit float precision storage. Since the Intel Xeon Phi coprocessor has vector processing units dedicated to perform these storage format conversions at hardware level, the latency associated with these conversion instructions is very close to the latency associated with arithmetic instructions. Employing both, float16 and unsigned short format representation, the strategy proved to be useful and able to saves 20% in memory/storage demands for a 3D TTI stencil.