oa HPC Implementation of the FWI Gradient Reduction Stage

Despite its simplicity, the gradient reduction stage can become a bottleneck in the execution of FWI (and RTM as well). Leveraging the file system for this stage can lead to very simple and easy to develop architectures, but performance can be limited and variability of performance can be significant. Leveraging the network may increase perfromance and reduce varibility, but the complexity to be managed is relevant. In this abstract, the optimization of this stage is analyzed and discussed